搜索资源列表
LED
- 本文介绍了一种全新的LED显示屏控制解决方案,主要使用Altera cyclone飓风FPGA和16位凌阳单片机SPCE061A作为主控器件,采用较普遍的74LS595作为LED 显示屏显示驱动芯片。
EP3C25EVM.rar
- cyclone III EP3C25 开发板原理图,包括flash, sdram, usb, ethernet 等接口电路,可作设计参考。,cyclone III EP3C25 development board schematic diagram, including flash, sdram, usb, ethernet interface circuit, etc., can be used for design.
Altera-Cyclone-II
- \ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone II(PCB/sch.lib)-ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone II(PCB/sch.lib)
EP1C6Q240C6
- EP1C6Q240C6开发板原理图,Altera公司的Cyclone系列FPGA—EP1C6Q240-EP1C6Q240C6 development board schematics, Altera' s Cyclone series FPGA-EP1C6Q240
EP1C6_EP1C12
- Altera FPGA Cyclone I EP1C6 EP1C12 最小系统 开发板 -the minimum system of Altera FPGA EP1C6 and or EP1C12
rf_wxtx
- 详细阐述了基于FPGA的RF无线通信技术的原理及硬件设计. 从系统的角度提出RF无线通信的完整设计方案,给出了基于Cyclone II芯片的Nios II的RF无线通信模块框图. 实验结果表明,采用ALTERA的Cyclone II芯片设计实现RF无线通信具有明显优势.-Detailed FPGA-based RF wireless communication technology theory and hardware design. From a system point of view p
Altera-Cyclone-III
- \ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone IiI(sch).lib
Altera-Cyclone1
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Altera Cyclone1(PCB/sch.lib)
Altera-EPC-Configuration-Device
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Configuration Device(PCB/sch.lib)
Altera-EPCS-Configuration-Device
- ALTERA CPLD\Protel99库_ALTERA\Altera Cyclone II\Configuration Device2(PCB/sch.lib)
ep2c5
- altera 公司提供的 Pin Information for EP2C5-Pin Information for the Cyclone II EP2C5 Device
june2010_1
- 一种新型SOPC自动指纹识别系统设计,:本文设计了一种基于SOPC的新型结构的自动指纹识别系统。通过对指纹处理整体流程的选择和优化,把耗时较多的指纹预处理部分整体硬件化,耗时较少的匹配部分软件化,使得系统处理速度有了显著提高,1.5s内可以完成一幅指纹图像的预处理,3s内可以完成一幅指纹图像的比对。本设计使用Quartus II软件完成了系统模块设计及仿真,使用NiosⅡ IDE软件完成了软件代码的实现,并在以Altera 公司的Cyclone II FPGA芯片为核心的DE2开发板上实现了整个
mar2010
- 基于FPGA的单精度浮点数乘法器设计,本文设计了一个基于FPGA的单精度浮点数乘法器。乘法器为五级流水线结构。设计中采用了改进的带偏移量的冗余Booth3算法和跳跃式Wallace树型结构,减少了部分积的数目,缩短了部分积累加的耗时;提出了对尾数定点乘法运算中Wallace树产生的2个伪和采用部分相加的处理方式,有效地提高了的运算速度;并且加入了对特殊值的处理模块,完善了乘法器的功能。单精度浮点数乘法器在Altera DE2开发板上进行了验证,其在Cyclone II EP2C35F672C6器
yinpinxinhaofenxiyi1233412
- 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核的基于FFT的音频信号分析仪-Based on Altera Cyclone II series FPGA embedded high-performance embedded IP core (Nios) soft core processor FFT-based audio signal analyzer
br-soc-fpga
- cyclone v的altera公司的带arm硬核的soc设计指南-cyclone v the product of altera with the arm hard process cores introductiong
altera-soc-cyclone-V
- 针对altera公司的soc平台的开发流程,适用于友晶cyclone v SOC开发板。-Altera soc platform for the company' s development process for Terasic cyclone v SOC development board.
AES-FPGA
- 本文介绍了AES加密算法通过不同的功能结构的FPGA实现,语言背景为VHDL-This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA
Altera-FPGA-Testing-v1
- This document describes functionality testing of the Altera Cyclone III FPGA Starter Kit Development Board. It also includes testing of associated daughterboards, i.e. the ADA ADC/DAC board and the HSMC to GPIO adapter board.
C5_SOC_DEVKIT_E
- altera Cyclone V SOC开发板原理图-schematic of altera Cyclone V SOC Demo
altera fpga说明
- FPGA详细介绍,介绍了altera cyclone系列器件的内部资源